Efficient Crossbar Switch Design For NOC

Network-on-Chip is an emerging paradigm for integrating a very high number of Intellectual Property blocks on a single Integrated Chip. The crossbar switch is one of the important parts of NoC. In this paper, a new crossbar switch is proposed which reduces the complexity of conventional switch by simplifying its data transport mechanism and using the dedicated input-output channel between source and destination. The proposed design reduces area by 40% and delays by 7.14% as compared to 2-D crossbar switch and area by 40% and delay by 9.53% as compared to the conventional crossbar switch. The functional verifiation and synthesis of proposed and conventional Crossbar switch design is done by using Xilinx ISE 9.2i.